R. Yeniçeri Et Al. , "Full Digital Implementation of A Chaotic Time-delay Sampled-data System," IEEE International Symposium on Circuits and Systems (ISCAS 2017) , Baltimore, Md, United States Of America, pp.1-4, 2017
Yeniçeri, R. Et Al. 2017. Full Digital Implementation of A Chaotic Time-delay Sampled-data System. IEEE International Symposium on Circuits and Systems (ISCAS 2017) , (Baltimore, Md, United States Of America), 1-4.
Yeniçeri, R., Vardar, A., & Yalçın, M. E., (2017). Full Digital Implementation of A Chaotic Time-delay Sampled-data System . IEEE International Symposium on Circuits and Systems (ISCAS 2017) (pp.1-4). Baltimore, Md, United States Of America
Yeniçeri, Ramazan, Alptekin Vardar, And Müştak Erhan Yalçın. "Full Digital Implementation of A Chaotic Time-delay Sampled-data System," IEEE International Symposium on Circuits and Systems (ISCAS 2017), Baltimore, Md, United States Of America, 2017
Yeniçeri, Ramazan Et Al. "Full Digital Implementation of A Chaotic Time-delay Sampled-data System." IEEE International Symposium on Circuits and Systems (ISCAS 2017) , Baltimore, Md, United States Of America, pp.1-4, 2017
Yeniçeri, R. Vardar, A. And Yalçın, M. E. (2017) . "Full Digital Implementation of A Chaotic Time-delay Sampled-data System." IEEE International Symposium on Circuits and Systems (ISCAS 2017) , Baltimore, Md, United States Of America, pp.1-4.
@conferencepaper{conferencepaper, author={Ramazan Yeniçeri Et Al. }, title={Full Digital Implementation of A Chaotic Time-delay Sampled-data System}, congress name={IEEE International Symposium on Circuits and Systems (ISCAS 2017)}, city={Baltimore, Md}, country={United States Of America}, year={2017}, pages={1-4} }