T. Tarim Et Al. , "Statistical design of a multiplier using a low voltage square-law CMOS cell," 1998 IEEE Asia-Pacific Conference on Circuits and Systems , Chiang-Mai, Thailand, pp.25-28, 1998
Tarim, T. Et Al. 1998. Statistical design of a multiplier using a low voltage square-law CMOS cell. 1998 IEEE Asia-Pacific Conference on Circuits and Systems , (Chiang-Mai, Thailand), 25-28.
Tarim, T., Kuntman, H., & Ismail, M., (1998). Statistical design of a multiplier using a low voltage square-law CMOS cell . 1998 IEEE Asia-Pacific Conference on Circuits and Systems (pp.25-28). Chiang-Mai, Thailand
Tarim, TB, HH Kuntman, And M Ismail. "Statistical design of a multiplier using a low voltage square-law CMOS cell," 1998 IEEE Asia-Pacific Conference on Circuits and Systems, Chiang-Mai, Thailand, 1998
Tarim, TB Et Al. "Statistical design of a multiplier using a low voltage square-law CMOS cell." 1998 IEEE Asia-Pacific Conference on Circuits and Systems , Chiang-Mai, Thailand, pp.25-28, 1998
Tarim, T. Kuntman, H. And Ismail, M. (1998) . "Statistical design of a multiplier using a low voltage square-law CMOS cell." 1998 IEEE Asia-Pacific Conference on Circuits and Systems , Chiang-Mai, Thailand, pp.25-28.
@conferencepaper{conferencepaper, author={TB Tarim Et Al. }, title={Statistical design of a multiplier using a low voltage square-law CMOS cell}, congress name={1998 IEEE Asia-Pacific Conference on Circuits and Systems}, city={Chiang-Mai}, country={Thailand}, year={1998}, pages={25-28} }