S. B. Ors And A. DERVISOGLU, "Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL," 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999 , vol.1, Milan, Italy, pp.402-405, 1999
Ors, S. B. And DERVISOGLU, A. 1999. Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL. 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999 , (Milan, Italy), 402-405.
Ors, S. B., & DERVISOGLU, A., (1999). Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL . 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999 (pp.402-405). Milan, Italy
Ors, Sıddıka, And Ahmet DERVISOGLU. "Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL," 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999, Milan, Italy, 1999
Ors, Sıddıka B. And DERVISOGLU, Ahmet. "Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL." 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999 , Milan, Italy, pp.402-405, 1999
Ors, S. B. And DERVISOGLU, A. (1999) . "Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL." 25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999 , Milan, Italy, pp.402-405.
@conferencepaper{conferencepaper, author={Sıddıka Berna Örs Yalçın And author={Ahmet DERVISOGLU}, title={Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL}, congress name={25th EUROMICRO Conference on Informatics: Theory and Practice for the New Millennium, EUROMICRO 1999}, city={Milan}, country={Italy}, year={1999}, pages={402-405} }