Precision improvement in current-mode winner-take-all circuits using gain-boasted regulated-cascode CMOS stages

Sekerkiran B., Cilingiroglu U.

2nd IEEE World Congress on Computational Intelligence (WCCI 98), Alaska, Amerika Birleşik Devletleri, 4 - 09 Mayıs 1998, ss.553-556 identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Basıldığı Şehir: Alaska
  • Basıldığı Ülke: Amerika Birleşik Devletleri
  • Sayfa Sayıları: ss.553-556
  • İstanbul Teknik Üniversitesi Adresli: Hayır

Özet

This paper presents a study on advantages and concerns of using gain-boosted regulated-cascoding technique in current-mode WTA circuits. For large scale integration and high frequency applications the use of MOS transistors with minimum feature size is a must. But modern MOS transistors having sub-micron channel length, exhibit pronounced channel-length modulation. This deficiency causes precision degradation in WTA circuits. With the use of gain-boosted regulated-cascoding technique, a very high precision can be achieved in current-mode WTA circuits formed using sub-micrometer transistors.