ASSUMEs: Heuristic algorithms for optimization of area and delay in digital filter synthesis


Aksoy L., Costa E., Flores P., Monteiro J.

13th IEEE International Conference on Electronics, Circuits and Systems, Nice, France, 10 - 13 December 2006, pp.748-749 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1109/icecs.2006.379897
  • City: Nice
  • Country: France
  • Page Numbers: pp.748-749

Abstract

In this work two heuristic algorithms are presented for the problems of optimization of area and optimization of area under a delay constraint in digital filter synthesis. The heuristics search for a solution on a combinational network that represents a covering problem using a greedy method for partial term selection. The methods start from the outputs towards the inputs for each coefficient. This top-down approach considers a much larger solution space than existing bottom-up heuristic algorithms. We present results on a wide range of instances and compare them with exact and prominent heuristic algorithms. The results demonstrate that the solutions obtained by the proposed heuristics are extremely close to the exact solutions and are significantly better than the existing heuristic algorithms.