JITTER ANALYSIS OF A PHASE-LOCKED DIGITAL TIMING RECOVERY-SYSTEM


PANAYIRCI E.

IEE PROCEEDINGS-I COMMUNICATIONS SPEECH AND VISION, cilt.139, sa.3, ss.267-275, 1992 (SCI İndekslerine Giren Dergi) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 139 Konu: 3
  • Basım Tarihi: 1992
  • Doi Numarası: 10.1049/ip-i-2.1992.0037
  • Dergi Adı: IEE PROCEEDINGS-I COMMUNICATIONS SPEECH AND VISION
  • Sayfa Sayıları: ss.267-275

Özet

An analytical approach is presented for the jitter performance of a timing recovery circuit consisting of a hard-limiter, an exclusive-or gate, followed by a second-order phase-locked loop. Exact expressions for the autocorrelation function and the power spectral density of the zero-crossing jitter in the data signal are derived, and then the phase jitter variance of the timing wave, generated at the output of the timing circuit, is obtained analytically as a function of various system parameters. Finally, numerical results and a comparative performance analysis show that considerable improvement can be achieved in jitter performance in addition to having the advantage of low cost and simple hardware implementation.