A capacitive threshold-logic gate

Ozdemir H., Kepkep A., Pamir B., Leblebici Y., Cilingiroglu U.

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.31, no.8, pp.1141-1150, 1996 (SCI-Expanded) identifier identifier

  • Publication Type: Article / Article
  • Volume: 31 Issue: 8
  • Publication Date: 1996
  • Doi Number: 10.1109/4.508261
  • Journal Name: IEEE JOURNAL OF SOLID-STATE CIRCUITS
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Page Numbers: pp.1141-1150
  • Istanbul Technical University Affiliated: No

Abstract

A dense and fast threshold-logic gate with a very high fan-in capacity is described. The gate performs sum-of-product and thresholding operations in an architecture comprising a poly-to-poly capacitor array and an inverter chain. The Boolean function performed by the gate is soft programmable. This is accomplished by adjusting the threshold with a de voltage. Essentially, the operation is dynamic and thus, requires periodic reset. However, the gate can evaluate multiple input vectors in between two successive reset phases because evaluation is nondestructive. Asynchronous operation is, therefore, possible. The paper presents an electrical analysis of the gate, identifies its limitations, and describes a test chip containing four different gates of fan-in 30, 62, 127, and 255. Experimental results confirming proper functionality in all these gates are given, and applications in arithmetic and logic function blocks are described.