Design and Implementation of a Custom Verification Environment for Fault Injection and Analysis on an Embedded Microprocessor

Ustaoglu B., Ors B.

3rd International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE), Beirut, Lebanon, 29 April - 01 May 2015, pp.256-261 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1109/taeece.2015.7113636
  • City: Beirut
  • Country: Lebanon
  • Page Numbers: pp.256-261
  • Istanbul Technical University Affiliated: Yes


Embedded microprocessors are widely used in most of the safety critical digital system applications. A fault in a single bit in the microprocessors may cause soft errors. It has different affects on the program outcome whether the fault changes a situation in the application. In order to analyse the behaviour of the applications under the faulty conditions we have designed a custom verification system. The verification system has two parts as Field Programmable Gate Array (FPGA) and personnel computer (PC). We have modified Natalius open source microprocessor in order to inject stuck-at-faults into it. We have handled a fault injection method and leveraged it to increase randomness. On FPGA, we have implemented modified Natalius microprocessor, the fault injection method and the communication protocol. Then the "Most Significant Bit First Multiplication Algorithm" has been implemented on the microprocessor as an application. We have prepared an environment which sends inputs to and gets outputs from the Natalius microprocessor on PC part. Finally, we have analysed our application by injecting faults in specific location and random location in register file to make some classifications for effects of the injected faults.