Defect-Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation


Tunalı O., Morgul M. C. , Altun M.

IEEE MICRO, cilt.38, ss.22-31, 2018 (SCI İndekslerine Giren Dergi) identifier identifier

  • Cilt numarası: 38 Konu: 5
  • Basım Tarihi: 2018
  • Doi Numarası: 10.1109/mm.2018.053631138
  • Dergi Adı: IEEE MICRO
  • Sayfa Sayıları: ss.22-31

Özet

In this paper, we study defect-tolerant logic synthesis of memristor-based crossbar architectures. We propose a hybrid algorithm, combining heuristic and exact algorithms, that achieves perfect tolerance for 10-percent stuck-at open defect rates. Along with defect tolerance, we also consider area, delay, and power costs of the memristor crossbars to elaborate on two-level and multi-level logic designs.