Analysing the potential of transport triggered architecture for lattice-based cryptography algorithms


Akcay L., Örs Yalçın S. B.

INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS, cilt.15, sa.5, ss.404-420, 2022 (ESCI) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 15 Sayı: 5
  • Basım Tarihi: 2022
  • Doi Numarası: 10.1504/ijes.2022.127164
  • Dergi Adı: INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS
  • Derginin Tarandığı İndeksler: Emerging Sources Citation Index (ESCI), Scopus, PASCAL, Aerospace Database, Communication Abstracts, Compendex, Metadex, Civil Engineering Abstracts
  • Sayfa Sayıları: ss.404-420
  • Anahtar Kelimeler: transport triggered architecture, TTA, RISC-V, lattice-based cryptography, post-quantum cryptography, PQC, embedded systems, application-specific processor, RISC-V, SECURE
  • İstanbul Teknik Üniversitesi Adresli: Evet

Özet

Lattice-based structures offer numerous possibilities for post-quantum cryptography. Recently, many post-quantum cryptography algorithms have been built on hard lattice problems. The three of the remaining four algorithms in the final round of the NIST Standardization Process rely on lattice-based methods. However, suitable processor architectures for these algorithms have not been sufficiently investigated. This study examines the potential advantages of transport triggered architecture for these algorithms. We compare popular 64-bit RISC-V processors with our conceptual transport triggered architecture processor over reference software implementations. Our processor provides better results than RISC-V competitors, regardless of the algorithm. It seems to be up to 3x faster, 1.6x-2x smaller, and consumes 1.3x-3.6x less energy than the compared RISC-V cores. Thus, an alternative base architecture is proposed for post-quantum cryptography processor development for embedded systems. The most critical shortcoming of the proposed architecture is the lack of compatible intellectual property core support for system-on-chip designs. We share comparative analyses with test results for different core configurations.