European Conference on Circuit Theory and Design, ECCTD 2015, Trondheim, Norway, 24 - 26 August 2015
Nowadays, Dynamic Partial Reconfiguration of digital circuits like Field-Programmable Gate Arrays (FPGA) appears as a sustainable hardware evolution phenomenon. Like many other architectures, Cellular Nonlinear Networks (CNN) are able to be adjusted or reprogrammed, when the characteristics of the problem are changed. Currently, changing memory content like parameters effects only the operation of architecture which has all functions, including momentarily redundant ones. The appeared question is how the overhead created by functional redundancy of hardware can be decreased. As discussed and studied in this paper, hardware pieces can be reconfigured to completely different designs when the characteristic of the problem is changed in run-time. The paper aims to exhibit the benefits of Dynamic Partial Reconfiguration feature of contemporary FPGAs on CNNs varying/evolving in time under the Network of Networks concept. For this purpose, trigger-wave generating sub-networks are combined using different reconfigurable partitions of an FPGA and a primary network is constituted which generates different trigger-wave patterns. This conceptual design unrolls how dynamic partial reconfiguration is capable to realize irregular/asymmetric network components.