25V Sampling Switch for Power Management Data Converters in 0.35 mu m CMOS with DNMOS


Aksin D. Y. , Ozkaya I.

35th European Solid-State Circuits Conference (ESSCIRC 2009), Athens, Greece, 14 - 18 September 2009, pp.137-140 identifier

  • Publication Type: Conference Paper / Full Text
  • City: Athens
  • Country: Greece
  • Page Numbers: pp.137-140

Abstract

A new high-voltage bootstrapped sampling switch with input signal range exceeding 11 times its supply voltage is presented. Proposed switch occupies a silicon area of 250 mu m by 160 mu m in 0.35 mu m twin-well CMOS process with drain extended NMOS (DNMOS) capability. The switch safe input signal range is restricted only by the DNMOS drain terminal breakdown voltage, i.e. 50V. Implemented switch can reliably track and hold 20V(PP) signal on 15V(DC) at 1MS/s with 2.2V supply without forward biasing any parasitic diode. A designed switched capacitor attenuator utilizing proposed high voltage switch can process 20V(PP) differential input reliably.