Cellular Automata with Random Memory (CARM) is a recently proposed Cellular Automata (CA) model with its digital implementation which is designed by the chain of logic gates (delay line). CARM models which are able to magnify physical noise in its delay line are a good candidate to design True Random Number Generator (TRNG). In this paper, a novel TRNG based on CARM is proposed and implemented on a FPGA. The proposed TRNG passes all the tests given by National Institute of Standards and Technology (NIST) without any post-processing. Furthermore, the implementation of proposed TRNG which ensures the 1Gbit per-second-bit-rate at 100 Mhz input clock, is compared with the other RNGs which were also implemented on FPGA.