A novel square root circuit using floating gate MOS (FGMOS) transistors operating in the saturation region is presented. FGMOS transistors are being utilized in a number of new and exciting analog applications. These devices are available in standard CMOS technology because they are being widely used in digital circuits. FGMOS structures are also known as multi-input MOS and their multi input advantages make it simpler to realize an arithmetic signal processing circuit. Thus floating gate devices are now finding wider applications by analog researchers. The FGMOS drain current is proportional to the square of the weighted sum of the input signals. This square law characteristic of the FGMOS transistor is used to implement the quarter square identity by utilizing only four FGMOS transistors in proposed square-root circuit. The main feature of this remarkably simple square root circuit is to reduce the errors generated by the second order effects in the current mode circuits employing translinear loop.