Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming

Aksoy L., Costa E., Flores P., Monteiro J.

43rd Design Automation Conference, San-Francisco, Costa Rica, 24 - 28 July 2006, pp.669-670 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1109/dac.2006.229313
  • City: San-Francisco
  • Country: Costa Rica
  • Page Numbers: pp.669-670
  • Istanbul Technical University Affiliated: Yes


In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowledge, the method presented in this paper is the only exact algorithm designed for this problem. We present the results of the algorithm on real-sized filter instances and compare with an improved version of a recently proposed exact algorithm designed for the minimization of area. We show that in many cases delay can be minimized without any area penalty. Additionally, we describe two approximate algorithms that can be applied to instances which cannot be solved, or take too long, with the exact algorithm. We show that these algorithms find similar solutions to the exact algorithm in less CPU time.