Hardware Implementation of Novel Image Compression-Encryption System on a FPGA


Bagbaba A. Ç. , Ors B.

9th International Conference on Electrical and Electronics Engineering (ELECO), Bursa, Turkey, 26 - 28 November 2015, pp.1159-1163 identifier

  • Publication Type: Conference Paper / Full Text
  • City: Bursa
  • Country: Turkey
  • Page Numbers: pp.1159-1163

Abstract

With the development of digital technologies, compression and encryption have become important aspects of information. In many applications, encryption of compressed images is considered vital for hiding data. In this work, we implemented the image compression-encryption hardware on a FPGA. JPEG was used as a compression standard and Tiny Encryption Algorithm was used as an encryption algorithm. Discrete Cosine Transform coefficients were encrypted by using two methods. First, only DC coefficients of each 8x8 block of image were encrypted. Then, along with DC coefficients, first five AC coefficients of each 8x8 block of image were encrypted. In the result, encrypted images and PSNR values were given in order to determine success of the work. This work is novel from the point of view encryption methods.