Impedance Matching Networks for Current Output Integrated Circuits


Amin H. Y. , Ozoguz S. , Yarman B. S.

2nd International Conference on Knowledge Based Engineering and Innovation (KBEI), Tehran, Iran, 5 - 06 November 2015, pp.66-70 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • City: Tehran
  • Country: Iran
  • Page Numbers: pp.66-70

Abstract

This paper is aimed to solve the problem of wideband optimum power transferring between low impedance current output high speed integrated circuits and standard 50 Ohm load. High amplitude current output circuits face some implementation obstacles, as an instance, in the TSMC 0.18 um CMOS process, in order to make the current carrying metal trace withstand to almost 80-120 mA, the trace should have characteristic impedance of about 6.25 Ohm, and consequently, the output should be terminated by a load having the same value as current carrying trace owns which leads to impedance mismatch. This paper presents on-chip and off-chip impedance matching networks to eliminate this obstacle. Two off-chip circuits (on 1mm FR4) and one integrated circuit are presented with design details and measurements. Matched system has shown almost sharp band-pass characteristics having a center frequency of 2.4 CHz with 800 MHz bandwidth.