Implementation Aspects for Interference Alignment

Yetis C. M., Anand K., Kayran A. H., Guan Y. L., Gunawan E.

IEEE International Conference on Digital Signal Processing (DSP), Singapore, Singapore, 21 - 24 July 2015, pp.580-584 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1109/icdsp.2015.7251940
  • City: Singapore
  • Country: Singapore
  • Page Numbers: pp.580-584
  • Keywords: Interference alignment, MIMO, OFDM, USRP, microcontroller, DSP, FPGA, ASIC, and prototyping
  • Istanbul Technical University Affiliated: Yes


Several interference alignment (IA) testbeds have been reported by research groups that validate the theoretical findings thus demonstrating the feasibility of IA. The design complexity of the IA testbed is significant since many simultaneous wireless links have to be established to observe the benefits of IA. Therefore, the already enormous efforts needed for the development of multiple-input multiple-output (MIMO) testbeds are folded multiple times in IA testbeds. In general, testbeds can be categorized into three groups depending on the hardware platform, generic, specific and the hybrid of two. Clearly, developing on generic, hybrid and application specific platforms in turn are the safe steps towards real life prototyping. There are many research groups that have been developing IA on generic platforms [1]-[17]. To the best of our knowledge, there is only one research group that has developed on a hybrid platform [18], and none on the application specific platform. In this paper, we review the experimental IA evaluations in the literature, include important aspects from well-known prototyping principles in the picture, and give comparative discussion with the state-of-art wireless communications testbeds.