Area Optimization Algorithms in High-Speed Digital FIR Filter Synthesis

AKSOY L., Güneş E. O.

21st Symposium on Integrated Circuits and Systems Design (SBCCI 2008), Gramado, Brazil, 1 - 04 September 2008, pp.64-69 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1145/1404371.1404396
  • City: Gramado
  • Country: Brazil
  • Page Numbers: pp.64-69
  • Istanbul Technical University Affiliated: Yes


In the last decade, efficient algorithms have been proposed for the multiplication of one data sample with multiple constants using addition/subtraction and shift operations, i.e., the multiple constant multiplications (MCM) problem. However, in these algorithms, an addition/subtraction operation is assumed to be a two-input operation that is generally implemented with ripple carry adders increasing the delay of the computation. On the other hand, carry-save adders (CSAs) are commonly used for high-speed implementation of multi-operand additions. The previously proposed algorithms designed for the optimization of the number of CSA blocks obtain good results, but they have been heuristics and cannot guarantee the minimum solution. In this work, we introduce an exact common subexpression elimination (CSE) algorithm that finds the minimum number of CSA blocks in the implementation of MCM. Furthermore, we present an approximate algorithm based on the exact CSE algorithm that can also handle general number representation of constants. It is shown by the experimental results that the algorithms introduced in this paper obtain competitive and better results than the previously proposed heuristics.