Efficient architectures for time-interleaved oversampling delta-sigma converters

Kozak, M; Karaman, Mustafa; Kale, I

doi:10.1109/82.861422

Efficient architectures for time-interleaved oversampling delta-sigma converters

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, cilt.47, sa.8, ss.802-810, 2000 (SCI-Expanded)

Yayın Türü: Makale / Tam Makale
Cilt numarası: 47 Sayı: 8
Basım Tarihi: 2000
Doi Numarası: 10.1109/82.861422
Dergi Adı: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus
Sayfa Sayıları: ss.802-810
İstanbul Teknik Üniversitesi Adresli: Hayır

Özet

A design methodology utilizing the concept of time-interleaved oversampling delta-sigma conversion is developed and explored to obtain efficient hardware architectures. In this approach, the time-domain internal node expressions of a standard modulator are rearranged according to the desired channel count to produce a modular structure with reduced hardware requirements. It is shown that the proposed approach results in an architecture which is functionally equivalent to that of the conventional method based on the block-digital filtering concept, brit with a reduced hardware complexity. The theoretical results are also verified by means of behavioral simulations.